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Thread: FPGA to SFP

  1. #1
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    Default FPGA to SFP

    I have designed Cyclone V based FPGA board.

    But i have connected with Normal IO instead of Transceiver IO.

    I need to clarify, whether this will work or not.

    I have attached schematic design.
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  2. #2
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    Default Re: FPGA to SFP

    This will depend on how fast you're hoping to operate the SFP module. At 1Gbps? Then no - it's not likely to work. If the SFP will run @ 400Mbps, and that's acceptable to you, then yes - you may be able to get it working.

    Refer to Table 33: 'High-Speed I/O Specifications for Cyclone V Devices' - in the "Cyclone V Device Datasheet" for the max differential data rates you can expect for 'normal' I/O.

    Cheers,
    Alex

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    Default Re: FPGA to SFP

    Hi Alex,

    Thanks for your reply.

    I would like to know, is there any AC coupling needed between FPGA and SFP.

    Because, while loop back testing SFP module I am always getting 1 output.

    May I know the difference between Normal IO vs Transceiver IO.

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    Default Re: FPGA to SFP

    SFP transceivers are AC coupled (already inside the module). You get only correct output with DC balanced signal, e.g. 8b/10b encoded. If you use LVDS I/O standard with Cyclone 5, add external DC bias for RX.

    There are 622 MBPS SFP modules that should work with Cyclone V standard SERDES. 1 GBPS modules are not specified for lower data rates, I presume they'll work at 400 - 600 MBPS as well.

    May I know the difference between Normal IO vs Transceiver IO.
    Gigabit transceivers of GX/GT devices have fast receiver hardware for 614 MBPS to 3.1/6.1 GBPS.

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    Default Re: FPGA to SFP

    Hi,

    Thanks for your reply.

    For the above design, i used Avango HFBR-57E0APZ SFP transceiver.

    I have designed for SFP loopback test. But I didnt receive any output.

    I would like to know, can i get the output with this schematic using this Avango IC.

    Please support.
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    Default Re: FPGA to SFP

    I have designed for SFP loopback test. But I didnt receive any output.
    How did you setup the test? What's the IO configuration?

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    Default Re: FPGA to SFP

    What happens if we connect the SFP differential transmitter and receiver pin with FPGA differential IO pin instead of Transceiver IO in Cyclone V FPGA.?

    What are the IP needed to communicate FPGA with SFP.?

    Please clarify.?

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    Default Re: FPGA to SFP

    Then it's possible to achieve the I/O speeds specified in the 'High-Speed I/O Specifications for Cyclone V Devices' section of the datasheet.

    What IP? This depends on what you want to do - you don't necessarily need any.

    Altera offer a 'Serial Gigabit Media Independent Interface', but you might struggle to get that working given how you've connected up your SFP.

    Cheers,
    Alex

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    Default Re: FPGA to SFP

    Quote Originally Posted by a_x_h_75 View Post
    Then it's possible to achieve the I/O speeds specified in the 'High-Speed I/O Specifications for Cyclone V Devices' section of the datasheet.

    What IP? This depends on what you want to do - you don't necessarily need any.

    Altera offer a 'Serial Gigabit Media Independent Interface', but you might struggle to get that working given how you've connected up your SFP.

    Cheers,
    Alex

    I tried to implement SFP without IP.

    But i am struck up with output.

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