Results 1 to 2 of 2

Thread: Convert AHDL to Verilog

  1. #1
    Join Date
    Oct 2017
    Rep Power

    Default Convert AHDL to Verilog

    I have a design in AHDL for a keyboard scanner and I'm trying to convert this to Verilog.
    The AHDL code is in the enclosed ZIP "". The Verilog code is shown hereunder.

    The line "assign lresult = (sensecount == i) && sense[7 - i];" gives an error that lresult is driven by multiple gates. Anyone an idea how I can solve that?
    Further remarks about the Verilog code also welcome.


    module kbd (sync,advance,mosi,eesel_n,sense,result,drv) ;

    // Input Port Declarations
    input sync;
    input advance;
    input mosi;
    input eesel_n;
    input [7 : 0] sense;

    // Output Port Declarations
    output result;
    output [15 : 0] drv;

    // Internal variables
    reg [15 : 0] drvcount;
    reg [7 : 0] sensecount;
    wire [15 : 0] ldrv;
    wire lresult;
    genvar i;

    always @(posedge sync)
    if (!eesel_n) drvcount <= 0;
    else drvcount <= drvcount + 1;

    for (i=0;i<15;i=i+1)
    assign ldrv[i] = (drvcount == i);
    assign drv = !ldrv;

    always @(negedge advance or posedge sync)
    if(sync) sensecount <= 0;
    else sensecount <= sensecount + 1;

    for (i=0;i<7;i=i+1)
    assign lresult = (sensecount == i) && sense[7 - i];

    assign result = (eesel_n)? lresult : 1'bZ;

    // add design description here
    Attached Files Attached Files

  2. #2
    Tricky is offline Moderator **Forum Master**
    Join Date
    Oct 2008
    Rep Power

    Default Re: Convert AHDL to Verilog

    Shouldnt lresult be a 6 bit vector. Otherwise lresult is being driven by each iteration of the for loop.

    If you didn't know, xilinx ise used to ship with an ahdl to vhdl/verilog translater. Xhdl I think.

Similar Threads

  1. AHDL, VHDL or Verilog?
    By gunardilin in forum Quartus II and EDA Tools Discussion
    Replies: 24
    Last Post: October 21st, 2014, 07:49 AM
  2. Replies: 5
    Last Post: October 3rd, 2013, 05:20 PM
  3. Converting from AHDL to Verilog
    By sparkyee in forum General Altera Discussion
    Replies: 3
    Last Post: May 2nd, 2011, 08:47 AM
  4. AHDL -> verilog HDL
    By MSchmitt in forum Quartus II and EDA Tools Discussion
    Replies: 5
    Last Post: September 24th, 2010, 09:08 AM
  5. How to convert ahdl into vhdl(or verilog)?
    By icmaster_0 in forum General Discussion Forum
    Replies: 3
    Last Post: June 12th, 2005, 06:41 AM


Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts