Questions regarding EPCQ256

[alexander14]

Hello,

I'm currently using the epcq 256 as general purpose memory and also flashing it with a .jic file. My concern was that the sectors that I am using for general purpose memory could be overwritten when flashing the .jic file to the epcq so I started looking into sector protection for the epcq. I am using two sectors as general purpose memory so I was thinking that after writing to them I would protect those sectors using the block protection bits. In the datasheet it says that

You can set the block protection bits in the EPCS/EPCQ/EPCQ-L status register to protect those sectors that contain configuration data, and are not intended for general-purpose memory usage

which makes it seem like it is used the other way around which is protecting the configuration file data from being overwritten by general purpose memory usage, however it can be used the way I am intending it right?

Although, in my testing I found that when I'm trying to set the block protection bits it didn't appear to be working as intended. so after setting the block protection bits to the status register I then immediately read the status register to verify what I was putting in is what is coming out and that doesn't appear to be the case. I put in 01100000b and then when I read it I see 111000000b and again I tried 00000100 and yet I see 01100100b when I read the status register. why would this be the case?

Finally, I decided to just try writing to the sectors I am using as general purpose memory and flashing the configuration file without setting any protection bits at all and seeing what happens and to my surprise it seems the data I put in is not overwritten when I flash the configuration file. I tried this in the base sector 0 and in the top most sector 511 and both times the data is still there after flashing the epcq. Why is that? it seems I don't have to worry about my data being overwritten at all but I want to make sure I know for sure that is the case.

Thanks for any clarification with this!

Alex

[austin944]

It's not clear to me what sequence of opcodes you are issuing. Can you clarify?
Are you using the write enable operation here? It is listed in the datasheet as 06h,
or
0000 0110
MSB LSB

[a_x_h_75]

When using a jic file the design programmed into your FPGA and the Quartus programmer together are clever enough to only erase and overwrite the sectors required. So, providing your general purpose memory is beyond the last sector required by your configuration stream you can be sure your user data will not be overwritten. Just be careful if you're using a compressed configuration stream as its size will vary.

Cheers,
Alex

[alexander14]

austin944, I think we are talking about two different things here. I see on page 28 of the datasheet where it says to set 06h for the write enable operation; however, I'm using the Altera ASMI parallel core to interface to the epcq which gives me the write enable operation as a signal that I just need to assert as 1 in order to enable a write operation. I'm talking about setting the status register bits for sector protection and a description can be found on page 18 of the datasheet for epcq. This is where I am trying to use the block protection bits in the status register in order to protect and unprotect sectors of the epcq and this is where I am running into issues. the ASMI parallel core datasheet says

The IP core uses only bits 2 to 3, or 2 to 4 for EPCS devices, and 2 to 5, or 2 to 6 for EPCQ/EPCQL devices out of the 8 bits for block protection. The rest of the bits have other meanings for the ASMI operation, and cannot be overwritten by the sector protect operation.

So I am dealing only with bits 2 through 6 of the status register for sector protection. What I was truly trying to do is protect sector 0 and unprotect everything else which on page 23 of the EPCQ datasheet shows that as BP0 = 1 and TB = 1 and that maps as bits 2 and 5 of the status register according to page 18 of the datasheet. So I set the status register bits as 00100100b (MSB->LS yet when I read the status register I see 00000100b (MSB->LS so I'm confused as to what happened to bit 5 as this also changes what sector is being protected.

a_x_h_75, so then it seems it is concern that my data can be overwritten if the .jic file is large enough to fill up those sectors containing my data?

[a_x_h_75]

You can lookup the maximum, uncompressed size that your chosen FPGA's configuration image will be. Providing you place your user data beyond that you'll be fine.

Cheers,
Alex