# Thread: Intel HLS example reports

1. Altera Guru
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## Re: Intel HLS example reports

Hi,

1.To get the difference between float and fixed data type you can use the tutorials the installation directory.
"..\intelFPGA_pro\17.1\hls\examples\tutorials"

2.Create simple project like multiplication to understand the difference.
Code:
```#include "HLS/hls.h"
#include <stdio.h>
#include "HLS/ac_int.h"
#include "HLS/ac_fixed.h"
#include "HLS/extendedmath.h"
#include "HLS/math.h"
typedef ac_int<8, false> fixed_8_t;
typedef ac_int<16, false> fixed_16_t;
#define N 2
component void dut(fixed_8_t a[N], fixed_8_t b[N], fixed_8_t *dout)
{
unsigned int i;
fixed_16_t acc= 0;
fixed_8_t a_reg, b_reg, sub;
fixed_16_t sub2;
for(i=0; i<N; i++)
{
a_reg = a[i];
b_reg = b[i];
sub = a_reg - b_reg;
sub2 = sub*sub;
acc += sub2;
}
*dout = acc;

}
int main() {
fixed_8_t z;
fixed_16_t ip = &z;
fixed_8_t x[N]={128,128};
fixed_8_t y[N]={128,128};
dut(x,y,&z);
printf("%d \n",*ip);
getchar();
return 0;
}```
3.What is the error you are getting from your code, can screenshot and post it?

Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)
Last edited by Anand Raj Shankar; February 11th, 2018 at 11:49 PM.

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## Re: Intel HLS example reports

Based on this modified code of yours now I am trying to use ac data type fixed . The two inputs are unsigned ac_ufixed<11,1>. The output is unsigned ac_ufixed<28,8>. The accumlator is ac_ufixed<28,8>, a_reg and b_reg as ac_ufixed<11,1> , sub as ac_fixed<12,2>, sub2 as ac_ufixed<21,1> . How can I define the test bench for this particular component ? Can you please help me particularly for the test bench of this component ? Below is my code snippet (component).... Thanks !

void diff_sq_acc( ac_ufixed<11,1> a[N], ac_ufixed<11,1> b[N], ac_ufixed<28,8> *dout)
{

unsigned char i;
ac_ufixed<28,8> acc= 0;
ac_ufixed<11,1> a_reg, b_reg;

ac_fixed<12,2> sub;

ac_ufixed<21,1> sub2 ;

for(i=0; i<N; i++)
{
#pragma HLS PIPELINE II=1

a_reg = a[i];
b_reg = b[i];
sub = a_reg - b_reg;
sub2 = sub*sub;
acc += sub2;
}

*dout = acc;
}

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## Re: Intel HLS example reports

Dear Anand,

can you please help me with the proposed code of mine in which i have used fixed data types ? I wll be grateful.

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## Re: Intel HLS example reports

Hi,

You can refer following code and i have not optimized it.
Code:
```#include "HLS/hls.h"
#include <stdio.h>
#include "HLS/ac_int.h"
#include "HLS/ac_fixed.h"
#include "HLS/extendedmath.h"
#include "HLS/math.h"
typedef ac_fixed<11, 1, false> fixed_11_1_t;
typedef ac_fixed<28,8,false> fixed_28_8_t;
typedef ac_fixed<12,2,true> fixed_12_2_t;
typedef ac_fixed<21,1,false> fixed_21_1_t;

#define N 2

component void dut(fixed_11_1_t a[N], fixed_11_1_t b[N], fixed_28_8_t *dout)
{
unsigned int i;
fixed_28_8_t acc= 0;
fixed_11_1_t a_reg, b_reg;
fixed_12_2_t sub;
fixed_21_1_t sub2;
for(i=0; i<N; i++)
{
a_reg = a[i];
b_reg = b[i];
sub = a_reg - b_reg;
sub2 = sub*sub;
acc += sub2;
}
*dout = acc;

}

int main() {
fixed_28_8_t z;
fixed_28_8_t ip = &z;
fixed_11_1_t x[N]={128.1,128.1};
fixed_11_1_t y[N]={128.1,128.1};
dut(x,y,&z);
printf("Test ecxecuted\n");
getchar();
return 0;

}```
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)

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## Re: Intel HLS example reports

thanks Anand...........can you please attach the running code and report in the attachment ? i will be grateful.

6. Altera Guru
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## Re: Intel HLS example reports

Hi,

You may see the warning "Compiler Warning: Auto-unrolled loop at xxxx/.cpp" it is because loop size which to be changed.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)

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## Re: Intel HLS example reports

thanks Anand..........and the simulation is done through Modelsim ?

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## Re: Intel HLS example reports

Dear Anand,

You have been a great help..... Just one last thing. I have a code from Xilinx repository. I have synthesized in Vivado. Can you please help me in that code also. I am trying to make comparative report . It is a sub optimal code and it should remain sub optimal.... It is in C++ and uses arbitrary precise data types. Does not need any changes. Below is the link......it is cordic square root........Please let me know...

https://github.com/Xilinx/HLx_Exampl...th/sqrt_cordic

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