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Thread: Multiple CPLD's + JTAG's question

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    Default Multiple CPLD's + JTAG's question

    Good morning,

    This my first time working on CPLD's, so I apologize for my mistakes.

    I am working on a design that would include 3 CPLD's (5M1270ZT144I5N). All were receiving 64 signals, some controls, and delivering 8 outputs. At first, all were going to be identical, so after some research, I decided to go with a single JTAG connection for all of them.

    However, as it turned out in the rest of the circuit, I would just need 8 outputs out of all three (instead of 24). I have been playing with the design to have the 3rd CPLD receiving the outputs of the other 2 as inputs, and then 8 outputs for the rest of the circuit. Now that I would need 2 different programs (1 x 2 CPLD + 1 x 1 CPLD), can I still use a single JTAG connector? We are very tight in real estate in the PCB, so having 3 JTAG connectors is not viable.

    My current implementation of the JTAG and CPLD's in a high level is something like the image attached.



    Any help provided will be highly appreciated!


    Jonathan
    Attached Images Attached Images

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    Default Re: Multiple CPLD's + JTAG's question

    Hi,

    Image is not clear.
    Do you want to program 3 max V device with 2 programming files respectively.
    if yes,
    1.When programming a chain of devices, one JTAG-compatible plug, such as a BitBlaster or ByteBlasterMV 10-pin male plug, is connected to several devices. The number of devices in the JTAG chain is limited only
    by the drive capability of the BitBlaster or ByteBlasterMV download cable.
    Refer below link for recommendation
    https://www.altera.com/en_US/pdfs/li...e/an/an095.pdf
    https://www.altera.com/en_US/pdfs/li.../PCG-01012.pdf

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards,
    Anand Raj Shankar
    (This message was posted on behalf of Intel Corporation)

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    Default Re: Multiple CPLD's + JTAG's question

    Anand,

    Thanks for the reply! Yes, that is the intent. Although I am trying to have all CPLD's with the same programming, I might end with 2 different programs. I made the connection following the guides you linked (I forgot to show the pull-up and pull-down resistors). What still gets me thinking is how to derive the drive capabilities. The documents does mention having more than 3 devices (that is why the buffers are being used), but not the limits of capabilities for programming.

    Regards,


    Jonathan

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    Default Re: Multiple CPLD's + JTAG's question

    Hi Jonathan,

    Intel Altera does not recommend any buffer/ driver part number.
    Based on SI, you can select the component.

    Best Regards,
    Anand Raj Shankar
    (This message was posted on behalf of Intel Corporation)
    Last edited by Anand Raj Shankar; April 6th, 2018 at 05:34 AM.

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    Default Re: Multiple CPLD's + JTAG's question

    Quote Originally Posted by Anand Raj Shankar View Post
    Hi Jonathan,

    Intel Altera does not recommend any buffer/ driver.
    Based on SI, you can select the component.

    Best Regards,
    Anand Raj Shankar
    (This message was posted on behalf of Intel Corporation)
    Hello Anand,

    Can you explain that statement? Intel does not recommend using any buffer/driver for the JTAG signals? Just connect a splice from TCK/TMS JTAG connector to the three CPLDs directly (I have 49.9 series resistors between the buffer/driver and the CPLD), one direct line from last TDO to JTAG connector, and TDI directly from JTAG connector to CPLD?

    Thanks!


    Jonathan

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    Default Re: Multiple CPLD's + JTAG's question

    Quote Originally Posted by gironja View Post
    Hello Anand,

    Can you explain that statement? Intel does not recommend using any buffer/driver for the JTAG signals? Just connect a splice from TCK/TMS JTAG connector to the three CPLDs directly (I have 49.9 series resistors between the buffer/driver and the CPLD), one direct line from last TDO to JTAG connector, and TDI directly from JTAG connector to CPLD?

    Thanks!


    Jonathan
    Hi Jonathan,

    Intel altera does not suggest/recommend any part numbers for buffer/driver, Designer can select one.
    Okay 49.9 ohm is it place on TCK & TMS lines, Which buffer/driver are you using(Part Number)?

    Best Regards,
    Anand Raj Shankar
    (This message was posted on behalf of Intel Corporation)

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    Default Re: Multiple CPLD's + JTAG's question

    Quote Originally Posted by Anand Raj Shankar View Post
    Hi Jonathan,

    Intel altera does not suggest/recommend any part numbers for buffer/driver, Designer can select one.
    Okay 49.9 ohm is it place on TCK & TMS lines, Which buffer/driver are you using(Part Number)?

    Best Regards,
    Anand Raj Shankar
    (This message was posted on behalf of Intel Corporation)
    Anand,

    I am using the NC7WZ16P6X (https://www.fairchildsemi.com/datasheets/NC/NC7WZ16.pdf).

    Thanks,

    Jonathan

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