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Thread: HPS-FPGA Communication using mSGDMAs in memory-mapped mode

  1. #1
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    Question HPS-FPGA Communication using mSGDMAs in memory-mapped mode

    Hello,

    I'm trying to write some data from HPS to an on-chip memory and to rewrite them in a memory in HPS (from the on-chip memory).
    I'm using a SoCKit board.
    As a first step, in both cases, I'm using a mSGDMA (in memory-mapped to memory-mapped mode) for each direction, in order to read data from HPS and to write them to FPGA, and to read data from FPGA and to write them to HPS. In addiction, I'm not considering the use of any further processor (as Nios II).
    Unfortunately, I didn't find any C code to use as a reference.
    To understand the flow and how I should write the related C code, I started by the code provided at this link, where a streaming to memory-mapped mode (and vice versa) is considered for the mSGDMA.
    But I didn't understand which addresses I should consider to read/write the CSR and descriptor register (some address is missed).

    Could you suggest to me any reference code to read/write using mSGDMA or what addresses should be : ALT_LWFPGASLVS_OFST, READ_MSGDMA_DISP_CSR_BASE, WRITE_MSGDMA_DISP_CSR_BASE, MEMTEST_MEMTEST_CONTROLLER_BASE?

    Thank you in advance!

  2. #2
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    Default Re: HPS-FPGA Communication using mSGDMAs in memory-mapped mode

    I would take a look at the baremetal code with this design example: https://www.altera.com/support/suppo...n-example.html

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