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Thread: Cannot edit the generated PLL Intel FPGA IP v18.0

  1. #1
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    Default Cannot edit the generated PLL Intel FPGA IP v18.0

    Hi All,


    I am using Quartus Prime v18.0 and generated PLL IP v18.0. I have successfully generated the PLL and added into the project but when I tried to modify it in the IP components, the MegaWizard failed to launch, below is the complete message of the problem.
    "Failed to launch MegaWizard Plug-In Manager. PLL Intel FPGA IP v18.0 could not be found in the specified library paths."
    See attachment for the screenshot.
    I tried other IP components, like FIFO, ALTLVDS_RX, ALTLVDS_TX, ALTCLKCTRL, all of it works fine.


    Quartus Prime: Version 18.0.0 Build 614 04/24/2018 SJ Standard Edition
    Target Device: Arria V GX (5AGXBB3D4F35I5)
    Machine: Windows 10 Pro 64bit


    Also, I tried the same thing on other PC (Windows 7) but the problem is the same.
    Need help to fix this issue.


    Thank You.


    Zeahr
    Attached Images Attached Images

  2. #2
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    Thumbs up Re: Cannot edit the generated PLL Intel FPGA IP v18.0

    Hi Zeahr,
    Thank you for your efforts, I replicated the issue & got the same “library paths” issue. We will come back soon.

    Best Regards
    Vikas Jathar
    (This message was posted on behalf of Intel Corporation)

  3. #3
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    Default Re: Cannot edit the generated PLL Intel FPGA IP v18.0

    I'm having the same problem with "Triple-Speed Ethernet" core. I used to be able to edit the core in a number of ways including opening the EMAC.vhd file generated by the wizard (attached) or double-clicking on the core in "IP Components" view.

    I'm on Windows 7 and using "Quartus 18.0 Standard".

    This was a project that worked fine in Rev 17.1. When I opened it, it asked to upgrade IP components. That feature seems broken as well since "Perform Automatic Upgrade" etc were greyed out and the only option available was close.

    Without a workaround, this essentially makes 18.0 unusable.


    EMAC_error.jpg
    Attached Files Attached Files

  4. #4
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    Default Re: Cannot edit the generated PLL Intel FPGA IP v18.0

    Hi,

    We acknowledge this issue and got a bug entry in the internal bug system. We will get back to you once we hear from our engineering team.
    Your Truly,
    Joseph Cheah
    Intel Customer Support - Engineering
    Sales Marketing Group
    (This message was posted on behalf of Intel Corporation)

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