For reasons not worth discussing here, we required that the Arria10 GHRD design be available in the Quartus Prime Standard tools suite. The below steps were used to convert the 17.1 GHRD design (provided by [|]) which was developed under Quartus Prime Pro, to build for the Quartus Prime Standard tools. The rbf generated by the Standard tools was confirmed to perform correctly (same as Pro rbf) on the Arria10 development board.

It is strongly recommended (practically mandatory) to have the GHRD design open in Quartus Prime Pro/Platform Designer while performing the conversion to Quartus Prime Standard.

  1. Make a copy of the 17.1 GHRD Pro directory that is known to have been successfully built and verified on the Arria10 Dev Brd.
  2. Within the copied version of the GHRD: Remove anything that wouldn't have existed when a 'new' project is created, such as, the gdb/ directory and all *.tcl, etc. The following 'rm -rf' was what is actual used, and the 'ls' shows the remaining files and directories.
    1. a10_soc_devkit_ghrd$ rm -rf ghrd_10as066n2/ *.tcl *.csv qdb tmp-clearbox top_level_template.v.terp Makefile *.xml hps_isw_handoff output_files sd_fat.tar.gz software tgz readme.txt .qsys_edit
    2. a10_soc_devkit_ghrd$ ls cti_tapping.stp fpga_niosii.sdc fpga_pr.sdc ghrd_10as066n2.dts ghrd_10as066n2.qsf ghrd_a10_top.v hps_sgmii.sdc jtag.sdc fpga_dp.sdc fpga_pcie.sdc fpga_sgmii.sdc ghrd_10as066n2.dtb ghrd_10as066n2.qpf ghrd_10as066n2.qsys ghrd_timing.sdc ip

  3. Rebuild EACH Platform Designer (Qsys) IP using Quartus Prime Standard tools, which has the affect of converting Pro Platform Designer IP to Standard Platform Designer IP.
    1. Edit the IPs' .qip files, to remove the "Pro" from the IP_TOOL_ENV "QsysPrimePro", to look like IP_TOOL_ENV "QsysPrime". The following grep/sed was used to perform this step, take note of the location in which is was executed.
      1. a10_soc_devkit_ghrd/ip/ghrd_10as066n2$ grep -rl 'QsysPrimePro' ./ | xargs sed -i 's/QsysPrimePro/QsysPrime/g'

    2. Within Quartus Prime Standard, "File" -> "Open Project" -> IP .qip and click through the "Next" windows, but ensure correct "Device" (*10AS066N3F40E2SG*) selected, and click "Finish".
    3. Execute "Start Analysis and Synthesis"
    4. Close Project (I repeatedly observed Quartus Prime Standard crashing when attempting to Open the next project, without Closing the current project).
    5. Repeat steps for each IP

  4. Convert the .Qsys from Pro to Standard:
    1. Edit the ghrd_10as066n2.qsys file: Remove " tool="QsysPro" ".

  5. Open the Qsys design in the Platform Designer, and re-declare each IP's "Type" and update IP "Parameters":
    NOTE: In this step, the IP Type names will be updated, parameters values changed and connections verified to match the Pro design.
    1. Launch Quartus Prime Standard, then launch the Platform Designer and open the 'modified' Platform Designer (ghrd_10as066n2.qsys) project.
    2. Notice that all of the IP modules are in RED text and that all of their Parameter:Type values are the same; 'altera_generic_component'.
    3. For each IP, execute the following steps:
      1. Click-on IP name in the System Contents window to highlight the Parameters.
      2. Within the Parameters tab, change the "Type" to match name used in Pro (For comparison, it helps to have Pro design open in Pro/Qsys(Platform Designer) tools).
        1. NOTE: There's no need to manually change "Version", as it should change automatically when correct "Type" is set and a "Refresh System" is executed in the next step.

      3. "File" -> "Refresh System" -> "Yes" (to "Save changes before refresh?"). The Version is updated as can be confirmed by reviewing the pop-up for "IP_name 17.1 (instead of 1.0)".
        1. NOTE: While the Type and Version have change, the conversion from Pro to Standard is NOT complete.

      4. Close the "Save and Refresh System Completed" pop-up window.
      5. If the IP has more parameters, modify them to match the Pro design.

    4. Review the connections to ensure they match the Pro implementation.
    5. "File" -> "Save"
    6. "Generate HDL" -> Check: Clear output directories for selected generation targets -> "Generate". Review the messages in the pop-up window.
    7. "Finish"

  6. Build the Quartus Prime Standard project and generate an rbf:
    1. Edit the .qsf:
      1. Replace "Pro" with "Standard": set_global_assignment -name LAST_QUARTUS_VERSION "17.1.0 Standard Edition"
      2. Remove/comment out Pro specific assignments: set_global_assignment -name GENERATE_PR_RBF_FILE OFF

    2. Open ghrd_10as066n2.qpf in Quartus Prime Standard.
    3. "Assignments" -> "Settings" -> "Files" : Remove *ghrd_10as066n2/ghrd_10as066n2.qip* from the list.
    4. "Processing" -> "Start Assembler" (should build everything). It seems to be normal for many of the entities to be reported as "entity does not exist in design". Since the generated RBF seems to work, it is unclear if this is truly an issue.

Good luck!