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Thread: modelsim does not generate clock signal

  1. #11
    Join Date
    Feb 2018
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    Default Re: modelsim does not generate clock signal

    I created own simple design file relative to the .vt file, refer the attached files & try yourself with fresh new project in Quartus tool.

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards
    Vikas Jathar
    (This message was posted on behalf of Intel Corporation)
    Attached Files Attached Files

  2. #12
    Join Date
    Jun 2018
    Rep Power

    Default Re: modelsim does not generate clock signal

    RTL simulation finally works! I used your guide and this helps!
    Now i see it all the matter of names. I've used the name of TB file in native link settings, not the name, which Quartus gave to TB module.
    Thank you a lot!

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