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Thread: Does PCIe HD IP include the PHY IP Core? How to pin assignment for differential?

  1. #1
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    Question Does PCIe HD IP include the PHY IP Core? How to pin assignment for differential?

    Hi all,

    I have one starter Kit of Arria V. And I want to realize one application with <Avalon-MM Arria V hard HD IP for PCIe>.

    My 2 questions:

    1. Does <Avalon-MM Arria V hard HD IP for PCIe> include the PHY IP Core?
    Need I add the additional PHY IP Core for <Avalon-MM Arria V hard HD IP for PCIe>?

    2. In the top-level entity of PHY IP Core of PCIe, which signals are for differential couples? How should I do pin-assignment for the differential?
    I cannot find the pair of +/- signals in the interface PHY IP Core of PCIe. It is confusion.

    I wait your professional answer.
    Thanks in advance.

  2. #2
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    Default Re: Does PCIe HD IP include the PHY IP Core? How to pin assignment for differential?

    Hi,

    1. Does <Avalon-MM Arria V hard HD IP for PCIe> include the PHY IP Core?
    Need I add the additional PHY IP Core for <Avalon-MM Arria V hard HD IP for PCIe>?
    Yes, Avalon-MM Arria V hard HD IP for PCIe include the PHY IP Core, Refer page No:12 or Configurations session of below link.
    https://www.altera.com/en_US/pdfs/li..._pcie_avmm.pdf

    2. In the top-level entity of PHY IP Core of PCIe, which signals are for differential couples? How should I do pin-assignment for the differential?
    Check the development kit user guide for pin details or design example for more information.
    Refer page No 37.
    https://www.altera.com/content/dam/a...rter_board.pdf

    Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

    Best Regards,
    Anand Raj Shankar
    (This message was posted on behalf of Intel Corporation)
    Last edited by Anand Raj Shankar; June 12th, 2018 at 12:18 AM.

  3. #3
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    Default Re: Does PCIe HD IP include the PHY IP Core? How to pin assignment for differential?

    Anand Raj Shankar,

    Thanks a lot.

    And I've also found one example about Avalon-MM Arria V Hard IP for PCI Express on Arria V GX Starter Kit. The link is following:
    http://www.alterawiki.com/uploads/2/...en2x4_14_0.zip

    It will be helpful for my design. Thanks again.

    Best regards
    JiaShiqi

  4. #4
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    Default Re: Does PCIe HD IP include the PHY IP Core? How to pin assignment for differential?

    Hi, Anand Raj Shankar

    It is very helpful to understand.

    Thanks a lot.

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